Beginning in the late 1970's, representatives from universities and industry convened a series of workshops on Very Large Scale Integrated Circuits (VLSI) in order to bridge the gap between abstract design and physical fabrication. Until that time, translation from the abstract logic circuit to a manufacturable layout was a labor-intensive process. Designing the physical layout required expertise in the fabrication process. Due to the laborious translation, logic designers received little feedback on the cost and performance consequences of their design decisions.
The series of VLSI workshops promoted the use of a fabrication-independent, geometric representation called CIF (Caltech Intermediate Form). Designers could produce CIF representations of their logic designs and apply simple geometrically-oriented design rules. If the CIF description met all the geometrical design rules, the design was guaranteed to be manufacturable. A number of silicon foundries would accept CIF inputs and produce fabricated chips. The CIF description would be translated automatically into detailed fabrication instructions meeting all constraints of the foundry's fabrication process.
Several benefits derived from the development of CIF and the associated design methodology it enabled:
An NSF-sponsored workshop was held on May 2-4, 1994
entitled New Paradigms for Manufacturing
to determine if it was
feasible to define an equivalent design methodology for mechanical systems
(or some subset of mechanical systems), decoupling the design
representation from the fabrication process. The participants in the
workshop concluded that there were enough potential similarities between
the VLSI design and some classes of mechanical design for rapid prototyping
to warrant further investigation. In particular, two new classes of layered
manufacturing processes were identified as having strong similarities with
VLSI fabrication: micro-electronic mechanical systems (MEMS) and solid
freeform fabrication (SFF). MEMS employs many of the same manufacturing
steps as VLSI and the MEMS community seems especially amenable to examining
the VLSI design methodology to adapt it to their tasks.
This workshop explored the potential
for a unified design methodology aimed at supporting the MEMS fabrication
(A previous NSF sponsored workshop held on June 2-5, 1995 at Carnegie Mellon University investigated the issues of design methodologies for SFF. NSF:95)